Papers about VITO and VITO tools

• M. G. Arnold and J. D. Shuler, "A Synthesis Preprocessor that Converts Implicit Style Verilog into One-hot Designs," Proceedings of the Sixth International Verilog HDL conference, Santa Clara, California, March 31-April 3, 1997. Best paper award.  powerpoint doi: 10.1109/IVC.1997.588530

• M. G. Arnold, T. A. Bailey, J. J. Cupal and M. D. Winkel, "On the Cost Effectiveness of Logarithmic Arithmetic for Back Propagation Training on SIMD Processors," 1997 International Conference on Neural Networks, Houston, Texas, June 9-12, 1997.

• M. G. Arnold, N. J. Sample and J. D. Shuler, "Guidelines for Safe Simulation and Synthesis of Implicit Style Verilog," Proceedings of the Seventh International Verilog HDL Conference, Santa Clara, California, pp. 55-66, March 15-17, 1998. (PDF File)

• M. G. Arnold, Verilog Digital Computer Design: Algorithms into Hardware, PTR Prentice Hall: Upper Saddle River, New Jersey, 602 pp., 1999.

• M. G. Arnold, J. J. Cupal and J. D. Shuler, "Blocking and Non-blocking Assignments in Explicit and Implicit Style Verilog," Proceedings of the Eight International HDL conference, Santa Clara, California, pp. 71-77, April 6-9, 1999. (PDF File)

• M. Arnold and M. Winkel, "Reconfiguring an FPGA-based RISC for LNS Arithmetic," Reconfigureable Technology: FPGAs and Reconfigurable Processors for Computing and Communications III, Proceedings of SPIE, Denver, vol. 4525, pp. 88-98, Aug 21-22, 2001. (Word Document) (PowerPoint presentation)

• Mark G. Arnold, "A RISC Processor with Redundant LNS Instructions," In EuroMicro Digital System Design DSD, pp. 475-482, Dubrovnik, Croatia, Aug.-1 Sept. 2006.

• S. Langhanoja, M. G. Arnold, “ARM Clones as a Benchmark for Implicit- and Explicit-Style Verilog,” Proceedings of the Work-in-Progress Session of 33rd EuroMicro Conference, Lübeck, Germany, August, 2007 powerpoint

• M. Arnold, P. Vouzis, "A Serial Logarithmic Number System ALU," in Proceedings of the 10^th EuroMicro Conference on Digital System Design, pp. 151-154, Lübeck, Germany, 27-31 August, 2007. (PDF File)

• P. D. Vouzis, S. Collange, M. G. Arnold, “A Novel Cotransformation for LNS Subtraction,” Submitted to the Journal of VLSI Signal Processing Systems, November 2007.

• P. D. Vouzis, L. G. Bleris, M. G. Arnold, M. V. Kothare, “A System-on-a-Chip Implementation for Embedded Real-Time Model Predictive Control,” IEEE Transactions on Control Systems Technology, vol 17, no. 5, pp. 1006-1017, Sept. 2009.

• M. G. Arnold and J. H Cho, “Parallax-Docking and Reconfiguration of Field Programmable Robot Arrays using an Intermittently-Powered One-Hot Controller”, IEEE International Conference on Reconfigurable Computing and FPGAs, Cancun, Mexico, Dec. 2009. (Word File)

• J. H. Cho, M. Kothare and M. G. Arnold , “Reconfigurable Multi-Component Sensors Built from MEMS Payloads Carried by Micro-Robots”, submitted to IEEE Sensor Application Symposium, Limerick, Ireland, Feb 2010. (Word File)

• M. G. Arnold and J. H. Cho, “Dual-Stylus-Arm Scratch Drive Micro-robots Controlled by an Onboard Parallax Algorithm”, IEEE International Conference on Robotics and Automation, Anchorage, May 2010. (Word File)

• M. G. Arnold and E. Chester, “DRIFT/VISC: Distributed, Redundant, and Inherently Fault Tolerant Microprobe Concept,” 7th International Planetary Probe Workshop, Barcelona, Spain, June 2010. (PDF abstract)

• M. G. Arnold, P. Vouzis, and J. H. Cho, “Bitstream Efficiency of Field Programmable One-Hot Arrays,” International Symposium on VLSI , Kefalonia, Greece, July 2010.

• M. G. Arnold, P.D. Vouzis, “Accelerating Verilog Simulation for One-Hot Designs using GPUs,” under review IEEE Micro, 2013.