Downloading VITOBS

The following options exist for downloading VITOBS. More information is available on the subset of implicit style behavioral Verilog supported by VITO and using VITOBS.


No use of this software is authorized except under this NOTICE AND DISCLAIMER. Downloading, use, copying, modification, and/or distribution of this software in its original or modified form implies your acceptance of this NOTICE and DISCLAIMER.

Permission to use, copy, modify and distribute this software and its documentation, for any purpose and without fee is hereby granted, provided that this permission notice appears prominently in supporting documentation and must be viewed prior to use, copying, modification or distribution. You are responsible for any modifications to the software which you make and notice that the software has been modified must be appended to this notice prior to further use, copying, modification or distribution.

This software is provided AS IS without warranty of any kind, including without limitation the warranties that the software is non-infringing, merchantable, or fit for a particular purpose, including high risk activities. The entire risk as to the quality and performance of the software is born by you. Should the software prove defective in any respect, you and not the developers, nor any parties associated with the developers, assume the entire cost of any service and repair.

This software may be subject to the Export Control Laws of the United States of America. It is your responsibility to determine the applicable laws and regulations and comply with them.

VITOBS is available only for UNIX-like environments, such as Linux or cygwin.

The source code includes a makefile and is written in C. To compile VITOBS requires a C compiler and the language tools flex and Bison. VITOBS uses UNIX script tools, like sed, to transform the source code into a form that a modified version of VITO is able to compile. After downloading the vitobs31.tar file, you need to tar -xf vitobs31.tar .  Then do cd vitobs31 followed by make; optionally you may test your installation with ./testinstall.

Comments, suggestions, or bug reports may be sent to the username "bugs" at the address derived from this website name

ARM, BasicStamp, Parallax, CUDA, Synopsys, Design Compiler Xilinx, Virtex and Verilog are trademarks of their respective owners.

Last updated on 12 Feb 2013