VITOCPP: Verilog Implicit to One-hot C++ simulation


VITO is a preprocessor that converts implicit style behavioral Verilog into other Verilog that describes a one-hot design. To the best of our knowledge, the output of VITO can then be synthesized into hardware using any of several commercially available Verilog synthesis tools. VITOCPP is a modified version of this tool which produces C++ code to allow a VITO-compliant verilog source to be simulated within a larger C++ program. Because VITOCPP and VITO use modified versions of the same file names, they must be installed in separate directories.

The implicit style input to VITO/VITOCPP may contain multiple @(posedge sysclk) statements, each corresponding to a state in the machine. The implicit style Verilog may also contain arbitrarily nested control statements (such as if and while .) The resulting C++ output from VITOCPP describes a one-hot controller of the kind produced by VITO.)

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To use VITOCPP:

Last updated on 10 Jan 2013